TSMC "says it's too expensive" and refuses to buy ASML's latest lithography machines before 2029; what is the strategy behind this?

TSMC plans to postpone the purchase of ASML's latest generation High-NA EUV lithography machines until 2029, citing excessive costs. This decision, made amidst surging demand for AI chips, reveals a deep contradiction between equipment costs and the business logic of wafer foundries. (Context: TSMC to invest $100 billion in the U.S. to build 3 wafer fabs and 2 advanced packaging plants; Trump: This could avoid tariffs on Taiwan semiconductors.) (Background: What is Terafab? Musk claims global chip shortage is 2% of demand; how to build a factory "bigger than TSMC"?) Reports indicate that TSMC has decided not to deploy this equipment until 2029, choosing to maintain its advanced process production lines with existing EUV technology (approximately €150 to €200 million per unit). $350 million is the asking price for ASML's latest flagship High-NA EUV (High Numerical Aperture Extreme Ultraviolet lithography machine). Bloomberg reported today (23rd) that TSMC executives revealed the new generation High-NA EUV equipment is "very, very expensive"... But honestly, is TSMC short on money? With AI chip orders flooding capacity, their calculation may be that when the technical advantages of the latest equipment are not enough to cover the premium costs, more expensive machines are not necessarily better investments. To add, EUV (Extreme Ultraviolet lithography machine) is currently an essential device for manufacturing advanced chips below 7nm, and the world's sole supplier is ASML of the Netherlands. Traditional EUV machines have a numerical aperture (NA) of 0.33, with each unit priced at approximately €150 to €200 million; High-NA EUV increases the NA value to 0.55, theoretically allowing for finer circuit etching on chips, making it the core of next-generation lithography technology. The cost: a price tag exceeding €350 million (approximately $410 million), nearly double that of traditional EUV. Currently, the mainstream processes for global AI training chips, including the N4/N3 nodes used by the NVIDIA H100 series, remain within the capabilities of existing EUV technology. In other words, the order demands of TSMC's core customers (NVIDIA, AMD, Apple) over the next few years do not require High-NA EUV to be met. ASML's annual EUV shipment volume is limited, and TSMC has historically been the buyer that absorbs the largest share. This time, TSMC's "postponement" signal affects not only ASML's short-term revenue but also market confidence in the entire High-NA EUV technology roadmap. Bloomberg reporter Neil Campling pointed out that current customers purchasing High-NA EUV, Intel and Samsung, are facing their own respective challenges. Intel is in a process restructuring phase with delays in multiple factory projects; Samsung's advanced process yield issues continue to attract attention. If TSMC is the only foundry capable of efficiently utilizing High-NA EUV but chooses not to buy it, this serves as a significant market signal regarding the adoption timeline of the equipment. Overall, TSMC's decision not to purchase High-NA EUV until 2029 does not mean the failure of this technology. A more accurate interpretation is: the combination of existing EUV technology and process optimization remains sufficient to meet most AI chip demands in the coming years. TSMC's layout for generations below 2nm (N2) is currently still planned to be completed using traditional EUV combined with Multiple Patterning technology, rather than a forced transition to High-NA EUV. This puts ASML's High-NA EUV in a delicate market position: a technological breakthrough, yet facing a wait-and-see approach from its most critical customer commercially. Only when TSMC's next technology nodes (1.4nm, 1nm generations) truly require the optical performance of High-NA EUV will this device reach its starting point for the mainstream market.